Signal integrity engineers and high speed digital engineers of multi-gigabit links are experiencing design challenges often associated with microwave frequencies. As a result, test instrument and simulation software vendors are providing solutions to tackle high speed channel characterization and design. The EDI CON technical tracks have been expanded in 2014 to include a new dedicated signal integrity, high-speed digital and EMC/EMI modeling/measurement track featuring papers on the challenges facing high-speed digital designers at the chip, package and board levels. The added HSD/EMC measurement and modeling track will take place on Thursday morning, April 10th. This track comprised of eight, 20 minute peer-reviewed presentations will complement related papers in the design tracks and various afternoon workshops held throughout the entire conference.