An external compensation circuit is needed to compensate for the nonlinear changes in capacitance so XCds/RL can remain in the high efficiency region. The capacitive reactance, XCds, varies from -5.88 to -93.27 Ω. Area 1 in Figure 4 shows that the impedance of the minimum capacitance value (1.18 pF) from 1.44 to 3.61 GHz varies from -93.27 to -37.20 Ω, which is ideal for high drain efficiency. Area 2 indicates that the impedance of the maximum capacitance value (9 pF) over the same frequency range varies from -14.73 to -5.88 Ω. In this work, the impedances of area 2 are transformed to those of area 1 (XCds/RL = 1 to 2.5) by designing an appropriate output compensation circuit. The circuit in Figure 4 is a simple two-stage microstrip series section and shunt open stub. By selecting the appropriate microstrip parameters, this simple structure provides the desired compensation when connected at the output.

Figure 5

Figure 5 Class J PA schematic (a) and assembled amplifier (b).

MEASUREMENT RESULTS

To validate the design method, a broadband, high efficiency, class J PA was fabricated using the Wolfspeed CGH40010F GaN HEMT transistor and a Rogers 4350B substrate. The device was biased at Vds= 28 V and Vgs = -2.8 V. To achieve broadband performance, the bias network was considered when performing input-output matching, which reduces the power leakage over a wide frequency band and improves output power and efficiency. The transistor packaging model was embedded in the output matching circuit to reduce the influence of parasitics. In addition, a multi-step matching method was used to increase bandwidth.

A schematic and a photograph of the class J PA are shown in Figure 5. Figure 6 compares measurements with simulation for gain, output power and drain efficiency over the 1.4 to 3.6 GHz frequency band. Output power at 2 dB compression was 39.7 to 41.2 dBm, with drain efficiency of 60 to 68 percent and gain from 9.8 to 13.2 dB. Figure 7 shows the ACPRs using a 5 MHz WCDMA signal, demonstrating -27.1 to -37.5 dBc over the band.

Figure 6

Figure 6 Measured vs. simulated drain efficiency, saturated output power and gain.

Figure 7

Figure 7 Measured ACPR.

 

Table 1 compares these results with the performance of other published broadband PAs. Although similar in most other respects, this design approach achieves greater bandwidth: approximately 88 percent compared to the 45 to 59 percent range reported for the other designs.

CONCLUSION

An optimum output capacitor impedance space for a wideband, high efficiency, class J PA was defined and corresponding compensation circuit designed. A stepped impedance circuit was also adopted for input and output matching, accounting for transistor package parasitics to extend the bandwidth.

Acknowledgment

This work was supported by the Zhejiang Provincial Natural Science Foundation (Grant LZ16F010001) and National Natural Science Foundation (Grant 61871169).

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