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Xilinx, Inc. announced a collaboration with Texas Instruments (TI) to develop scalable and adaptable digital front-end (DFE) solutions to increase energy efficiency of lower antenna count radios.
Xilinx, Inc. introduced the Zynq RFSoC DFE, a breakthrough class of adaptive radio platforms designed to meet the evolving standards of 5G NR wireless applications.
Avnet announced the availability of the Avnet XRF16™ system-on-module, featuring the Xilinx Zynq UltraScale+ Radio Frequency (RF) System-on-Chip SoC Gen-2, enhancing Avnet's product offerings for developers working on applications that require next-generation 5G connectivity by accelerating valuable development and production time.
Integrated Device Technology Inc. (IDT) announced RapidIO® Gen3 interoperability with Xilinx UltraScale™ FPGAs, enabling a key technology for global rollout of 5G and other advanced network systems. IDT RapidIO RXS switches, coupled with Xilinx UltraScale FPGAs, deliver the essential combination of ultra-low 100ns latency interconnect and programmable computing with application-specific accelerators needed for 4G advanced and 5G programs.
Xilinx Inc. and Analog Devices Inc. announced that they have achieved JESD204B interoperability between Xilinx JESD204 LogiCORE™ IP in the Kintex®-7 FPGA and the ADI AD9250 analog-to-digital high-speed data converter. Achieving JESD204B interoperability between logic and data converter devices is a significant milestone in promoting the widespread adoption of this new technology.
Analog Devices Inc., in collaboration with Xilinx® Inc. and MathWorks Inc., is launching a series of design conferences for analog, mixed-signal and embedded systems engineers. Based on the theme “Discuss. Design. Deliver.,” the conferences will bring together experts in high-performance analog, field-programmable gate arrays (FPGA) and modeling tools to present complete signal chain and system-ready solutions for complex design challenges.
Analog Devices Inc. introduced the AD9250 dual-channel, 14-bit, 250 MSPS, A/D converter featuring the JEDEC JESD204B serial output data interface standard. The AD9250 A/D converter is the first-to-market with full JESD204B Subclass 1 deterministic latency at 250 MSPS. This functionality accommodates the precise synchronization of multiple data-conversion channels through a serial interface.
