The spectrum above 90 GHz is foreseen as a key enabler for the next generation of mobile networks. The large amount of spectrum paves the way for high capacity wireless links. Many challenges still need to be overcome to make this technology a success. This article describes some of the scenarios for the spectrum above 90 GHz, coveted by the cellular industry for 6G. A benchmark of semiconductor technologies is discussed to highlight promising candidates and channel-bonding architectures as a suitable option for the implementation of extremely broadband RF radios with acceptable power consumption. Opportunities, challenges and some recent experimental results of D-Band transceivers implemented in CMOS technologies are discussed.
Next generation wireless networks are imagined to be faster, more reactive, ultra-reliable and denser. Therefore, the exploitation of new and wider bandwidths at higher frequencies is a promising solution toward very high data rates (100+ Gbps) and ultra-low latency (sub-ms). The frequency from 90 to 300 GHz, and the terahertz spectrum above 300 GHz, are definitively foreseen as key enablers for 6G communication systems.1 Several applications can already be imagined: high capacity back-haul/front-haul; short-range high data rate hot spots and device-to-device Gbps ultrashort-range communications as depicted in Figure 1.
Figure 1 Different scenarios for above-90 GHz wireless communication.
There are many challenges that need to be addressed to achieve high data rate communications for future deployments above 90 GHz. Performance and quality-of-service (QoS) are the main concerns for efficient adoption of these bands by stakeholders. Industrial concerns will be the most demanding in terms of performance and most promising in terms of market adoption. A specific aspect of very high frequency bands is that they will not provide long terrestrial-distances, as propagation losses make them impractical. Therefore, small cells are expected to be a key in the network and a direct consequence of this is the higher number of required elements, implying that low-cost and high energy efficiency will be critical goals.
System developments are usually built from the best individual building blocks. However, above 90 GHz, careful attention to the overall architecture must drive the selection of individual metrics and associated performance, closely related to power consumption and cost. Size may also be regarded as a key point as actual sparsity and sustainability will support environmental considerations and social adoption. All these beginning considerations address more challenging than ever targets to address high performance, given that frequency and expected throughput are very high, and bandwidth is very wide. In addition, it must still be possible to integrate all these features into a low-cost semiconductor process.
Starting from the antenna, a key component at these frequencies, directivity becomes a major issue, as user connection relies on narrow “pencil” beam-forming MU-MIMO (multi-user MIMO) providing higher gain, enhanced selectivity and jammer blocking thanks to spatial division multiple access (SDMA). The best antenna architecture will maintain performance but not at the cost of IC count, which has to be kept low. Antenna array designs too often mean multiple front-end modules (FEM) or transceivers.
Higher bandwidth than the previous generations, spread over multiple channels, has to be addressed without multiplying transceiver building blocks, especially power hungry and IC-area-consuming frequency synthesizers. So, PHY optimization is key to be supported by frequency generation, compatible with accessible integration constraints, over which high integration on a mainstream CMOS process is to be considered.
Addressing above 90 GHz bands therefore triggers cross-domain thinking for efficient implementation including small form factors and low-cost. In this article, two topics are highlighted: the choice of semiconductor technologies to address above 90 GHz spectrum as well as some architectural clues for designing low-cost and high performance RF front ends.
FRONT-END SEMICONDUCTOR TECHNOLOGY CANDIDATES
Silicon-based technologies offer low-cost compromises for RF and mmWave applications. However, the comparison of technologies is always difficult as technical metrics are cross-domain and non-technical parameters are also to be taken into account. We propose a benchmark of technologies focusing on intrinsic performance. In order to compare the technologies, a target representation of what should be requested to fit with the RF and mmWave wireless transceiver challenges is proposed in Figure 2.
Figure 2 Process technology target.
Different criteria are depicted and will be placed in a target representation:
Power: RF output power availability from a technology depends on breakdown voltage (BV), and on the maximum current driven by the transistor (Imax) values. For a fair comparison, let’s define the max power as BV multiplied by 200 mA, which is optimistic for CMOS processes, and realistic for BiCMOS.
High Speed Digital Integration: RF digital control and digital pre-processing techniques are mandatory for mass-market and cost-efficient solutions. High speed digital integration depends on inverter size and efficiency (transit time/current).
Selectability: This is the ability to switch RF and mmWave signals with high isolation.
Linearity: The relation between the output current and the input voltage-control signal of the transistor gives the first order of the linearity while gm2 and gm3 impact IMD2 and IMD3 of the amplifiers.
Matching: This property defines the different behavior between two minimum-size transistors close together.
Isolation and HQ Passives: These are given by substrate resistivity and the presence of thick metal levels.
Ft-NF: Ft gives the potentiality for high frequency digital-clock and RF oscillator applications, NFmin determines the sensitivity of receivers.
Fmax: This the frequency of the 0 dB power gain, which impacts the gain availability of receive and transmit chains. For a linear class A amplifier, the maximum application frequency is lower than Fmax/3, (used in the comparison) for a switch-mode class-D amplifier, it is lower than Fmax/10 in an ideal case.
Figure 3 Comparison of technology over the defined key parameter indicators.
Advanced CMOS processes are very attractive for developing mixed RF systems-on-chip, as they offer very high integration potential and still, node after node, demonstrate better RF performance. Four different families in the 45 to 22nm node ranges are evaluated to address above 90 GHz applications: The bulk planar family is represented by a CMOS 40nm VLSI (TSMC); the partially depleted SOI family by a RF 45nm SOI CMOS (GlobalFoundries); the fully depleted SOI family by a FDSOI 22nm CMOS (GlobalFoundries) and finally, the FinFET family by a 22nm FinFET CMOS (see Figure 3). The Fmax limitation of these processes drives the only thin gate-oxide-transistor (or GO1) use, to perform RF functions, including power amplifiers targeting applications above 90 GHz.
