This article highlights the test requirements and challenges for digital RF memory (DRFM) jammers, describing the available solutions and pointing out their benefits. The focus is on the three main test areas for DRFMs: system tests, RF/IF stage tests on the module and subsystem and exploration of the digital backend.
DRFM jammers play an essential part in the electronic attack (EA) suite and are instrumental in ensuring mission success and improving platform survivability. DRFMs have been present for quite some time - the earliest reference appears in an article by Sheldon Spector called “A Coherent Microwave Memory Using Digital Storage: The Loopless Memory Loop,” published in the January/February 1975 issue of Electronic Warfare, a publication of the Association of Old Crows.
During World War II, radar engineers developed the pulse compression technique. Upgrades in radar range resolution came with improvements in signal-to-noise ratio (SNR). This combination, along with phase-coherent klystron-based transmitters, gave radar engineers an advantage that made barrage jamming relatively ineffective, due to the high output requirements for broadband stand-off jammers. In the early development stages, a DRFM jammer was a simple device consisting of a receive path, signal processing with modification and a transmit path. The main objective of the DRFM jammer was to digitally capture and retransmit an altered RF radar return signal with sufficient fidelity to deceive the radar processor.
With advancements in semiconductor technology in the 1980s, new signal processing techniques for radar were widely adopted. These techniques, such as moving target and stationary target indication, gave the radar several improvements, one of which was significant signal processing gain. As a result, it became extremely difficult to jam or deceive a radar.
The electronic warfare (EW) community responded by developing complex EW pods and deception techniques to counter radar advancements, giving birth to the modern DRFM jammer. Today, DRFM is an essential part of the EW attack suite. The basic architecture of a DRFM module remains the same: receive, data processing and transmit. A coherent oscillator ensures that both paths have a constant phase difference, the same frequency and the same waveform. Modern DRFMs are characterized by wideband RF front-ends (RFFE) with instantaneous bandwidths exceeding 2 GHz. Wideband analog signals are digitized using high speed analog-to-digital converters (ADC), processed and retransmitted back via high speed digital-to-analog converters (DAC). Access to vast processing power using field-programmable gate arrays (FPGA), digital signal processors (DSP) and flexible, freely configurable deceptive techniques generators make DRFM a formidable asset in the EA arsenal.
A critical requirement of electronic countermeasure (ECM) systems is to provide RF return signals to a radar with sufficient fidelity of the Doppler shift, range and radar cross section to ensure that the radar interprets the return signal as a “real” target. Phase correction is used to correct phase discontinuities resulting from a range update during the coherent processing interval.
For the RFFEs, modern DRFMs employ a range of receiver architectures. One of the highest performance architectures is the channelized receiver, which offers a good compromise between bandwidth, sensitivity and cost. Latency for modern DRFMs is on the order of nanoseconds. A rule of thumb for radar developers is that one microsecond corresponds to roughly 150 m range.
Figure 1 DRFM block diagram.
TEST REQUIREMENTS
For this discussion, the device schematic is divided into analog and digital components (see Figure 1). The three main areas of DRFM testing are:
System level or verification and final system test. At this stage, development engineers typically perform an analysis of the deception techniques to ensure proper operation. These tests include direction finding (DF), to ensure the system identifies emitter direction; output stability of the DRFM module (both phase and amplitude); latency; spectral purity; error vector magnitude and global navigation satellite system. Also, electromagnetic compatibility (EMC) measurements are important to ensure the system’s EMC compliance.
RF/IF stage or tests focused at the submodule and component levels. Several measurements are performed here, including component and submodule characterization of spurious, dynamic range, compression point, gain and phase response with frequency, noise figure, IP3, receiver sensitivity, quadrature error, local oscillator performance (phase noise, leakage and stability) and antenna radiation.
Digital stage testing comprises parameters such as clock jitter, timing and power integrity. A noisy power supply will affect overall performance and can be a beacon for electronic counter-countermeasures (ECCM). Typical measurements include power integrity, clock jitter, latency, timing, equalizer flatness, electromagnetic interference debugging, FPGA, DSP and data converters.
SYSTEM LEVEL TESTS
The spectrum analyzer and signal generator are typical test instruments. In addition, simulating a complex electromagnetic environment is important for stress testing, verification and debugging. To ensure proper emitter location, more advanced DRFM systems perform angle of arrival measurements, which require signals time and phase aligned at a reference plane.
Figure 2 Test system for DRFM characterization.
Rohde & Schwarz offers a test system for DRFM testing (see Figure 2), based on the R&S SMW vector signal generator and R&S SGS signal source generator, giving the user the ability to generate up to eight coherent emitters at 20 GHz. Adding the complementary R&S Pulse Sequencer with electromagnetic environment simulation software gives complete control over the system and the ability to generate complex emitter scenarios. The system is calibrated using the R&S NRP-Z81 wideband power sensor to ensure the desired phase at the reference plane. For precise phase accuracy and stability, the multichannel phase-coherent system includes R&S SMW signal generators synchronized via a common local oscillator provided by the R&S SMA100B analog signal generator. The combination of a very low phase noise and high output power makes the R&S SMA100B well suited for this task. A dense emitter environment scenario can be generated using the R&S Pulse Sequencer software. The DF systems are based exclusively on commercial off-the-shelf technology. This provides improved availability, serviceability and the flexible use of test equipment when it is not dedicated to DF tests.
