Reducing product development time requires design tools and a flow that support and expedite all stages of development, from translating performance requirements into an initial design through to optimization, physical layout and final EM verification, all before fabrication and test. This article examines new electronic design automation (EDA) software technology in the domain of network synthesis for the development of impedance-matching circuits. Network synthesis technology is used for RF/microwave applications to ensure that the input impedance of an electrical load or the output impedance of its corresponding signal source maximizes the power transfer by minimizing signal reflection from the load that occurs from impedance mismatch.
An RF/microwave component design flow must offer design entry (most often schematic-based), nonlinear simulation, the ability to view/review results, the ability to generate physical (layout) design from the schematic and support for electromagnetic (EM) analysis for characterization/verification of the electrical response of the physical design. The network synthesis tool should leverage this flow using device data that is incorporated in any given design project and generate networks in a schematic form that is recognizable to the simulator. As an example, such a flow is offered by the NI AWR Design Environment platform as it provides engineers with capabilities to tackle design entry and simulation prior to manufacturing, while allowing a smooth transition to fabrication and test with minimal design iterations. A network synthesis tool should leverage this flow using device data that is incorporated in any given design project and generate networks in a schematic form that is recognizable to the simulator.
Network Synthesis Wizard
Figure 1 Network synthesis addresses multi-band matching challenges.
Complementing these capabilities are advances in the platform specific to design automation and initiatives in specialized design wizards such as load-pull analysis. This most recent release introduces the network synthesis wizard for the development of impedance-matching networks, as shown in Figure 1. This functionality accelerates design starts and enables designers to more fully explore design options through the creation of optimized two-port matching networks with discrete and distributed components based on user-defined performance goals. Network synthesis is helpful at the earliest stages of a design to help determine reasonable performance targets based on device performance limits, device sizing (decisions on active device periphery), part selection for discrete packaged transistors and other early design decisions.
A synthesis solution is particularly helpful for challenging broadband single- and multi-stage amplifiers and antenna/amplifier-matching networks and is available as an add-on module. The tool also aids designers in developing impedance-matching networks between front-end components. As the footprints of RF components shrink in order to meet market demand for smaller embedded radios such as IoT smart devices (see Figure 2), the network synthesis wizard helps designers save space, consolidating component-to-component-matching networks by directly transforming the impedance between each component rather than to an intermediary characteristic impedance (such as 50 ohms).
Figure 2 Embedded antenna and RF front-end in wireless wearable device (images courtesy of Striiv).
Figure 3 The search engine explores possible topologies by expanding the solution up to the maximum number of sections as defined by the user.
Furthermore, networks can be optimized for noise, power or interstage matching. The optimum reflection coefficients are specified over frequency and can be provided in the form of load-pull data, network parameter data files or circuit schematics. Specifications for network topology include series and shunt component types and maximum number of sections. With a given set of user input specifications (performance requirements), the synthesis algorithm searches circuit topologies and optimizes component parameter values to generate candidate matching networks for power and low noise amplifiers, as well as inter-stage and inter-component impedance-matching networks.
Optimization Technology
The new network synthesis wizard is made possible with recent advances in computer processing power and the introduction of genetic algorithm methods, which have proven very effective in addressing circuit response problems. This technology leverages the algorithms first employed within AntSyn™ antenna design, synthesis and optimization module and results in a rigorous optimizer. The optimizers use recombination and selection to rapidly and robustly explore numerous points randomly distributed over the design space. This results in a more efficient and faster approach to investigating design possibilities and identifying optimum solutions.
The method used by the search-based synthesis engine to determine candidate circuit topologies is based on input from the user-specification of which element type, such as capacitors, inductors and transmission lines, is to be used in the series and shunt slots. The synthesis tool then performs an exhaustive search, exploring all possible topologies by expanding the solution up to a maximum number of sections as defined by the user, as shown in Figure 3. Heuristic methods are used to determine what element can follow an existing element. Through this self-learning process, the synthesizer understands that certain elements can be placed serially, such as two different width transmission lines to form a stepped-impedance transformer or a fully-distributed transmission line network for higher frequencies. On the other hand, two serial capacitors would not make sense from a matching perspective; consequently, those search efforts are not pursued.
