Anritsu Co. (DesignCon booth #501), a world leader in high-speed signal integrity test solutions, will present a series of technical and educational sessions during DesignCon to help engineers solve the measurement challenges associated with designing high-speed semiconductors, and communications systems and devices. Additionally, technical demonstrations will be held in the Anritsu booth throughout DesignCon, which is scheduled for January 28-31 in the Santa Clara Convention Center, Santa Clara, CA.
Conference Papers
Anritsu will deliver technical papers on Tuesday, January 28, and Thursday, January 30. The Tuesday session, entitled Tips on Improving Test Time When Measuring High-speed Digital Signals, will focus on conducting accurate measurements on high-speed signals operating at 30 Gbps. Led by Toshihiro Suzuki of Anritsu, this presentation provides measurement procedures for analyzing high-speed digital signals and how to reduce test time by eliminating uncertain factors from measurements. It will be held in Ballroom J from 1:30 – 4:30 p.m.
The Thursday session, co-authored with Wild River Technology, LLC, will be held in Ballroom K from 11:05-11:45 a.m. and include Dr. Jon Martens and Bob Buxton of Anritsu as presenters. Managing S-parameter Data for 10 to 32 Gb/s Time-Domain Simulations will offer practical methods of managing S-parameters for optimal time domain simulation correspondence; identify causality and convergence issues that plague time domain, and how to resolve these issues in the S-parameter sampled system; and provide illustrative examples of measurement uncertainties achieved for various structures using classic structures and one novel structure.
Technical Sessions
Four technical sessions will be hosted by Anritsu on Wednesday, January 29, from 9:00 a.m. - 5:00 p.m. in Mission City Ballroom M2. The sessions combine tutorial and demonstrations using Anritsu’s leading-edge solutions, such as the MP1800 Signal Quality Analyzer BERT with 4PAM/8PAM converters and VectorStar™ Vector Network Analyzer (VNA).
Signal Integrity BIT Error Rate Test Solutions– Conducting accurate measurements on high-speed signals operating at 30 Gbps requires proper test instruments and an understanding of the measuring solution’s limitations. This session will review and demonstrate instrument considerations, such as peripherals, instrument impedance on measurement waveforms, clock and data length when making jitter measurements, and clock recovery unit requirements.
Super Channel Test Solutions– This session demonstrates how multi-bit transmission technologies like 4 Pulse-Amplitude Modulation (4PAM), 8PAM, and Quadrature Amplitude Modulation (QAM) are being used to control increases in symbol rates. Methods and solutions for complex testing of 4/8PAM using multi-channel 32G BERT and emphasis will be shown.
Testing AOC/DAC QSFP+ Cables up to 100G– Achieving stable 4-channel duplex communications requires spec compliance of traffic signals under stressed conditions and in the presence of crosstalk. Creating the stressed signal conditions for evaluating Active Optical Cables per Infiniband specifications for 56Gb/s (FDR) and 104Gb/s (EDR) Infiniband cables will be discussed and shown.
Role of Improved Measurements and Tools in Assessing Simulation-Measurement Correspondence for 32 Gbps Systems– Signal integrity engineers are using frequency domain measurements to characterize designs. This presentation will highlight considerations, including the importance of the extent of the frequency range at low- and high-end of S-parameter measurements and how this affects achieving correlation between simulation and measurement. The use of tools such as VNAs, channel modeling platforms and BERTS will be described.
Booth Demonstrations
Anritsu will have demonstrations in its booth throughout DesignCon, as well. BER, emphasis, and jitter measurements will be conducted on an Avago Technologies 25Gb/s evaluation board with electrical SerDes, parallel optical links, and various channel trace lengths using the MP1800A BERT. A VectorStar station, including the Wild River Technology CMP, will highlight the importance of simulation-measurement correspondence.
In the MicroPacket booth (#742), Anritsu’s high-performance VectorStar will be demonstrated with PacketMicro’s innovative ruggedized RF probes for benchtop testing of large PCBs. PacketMicro’s HSProbeTM family is specifically designed for direct probing on top of circuit components or test pads on an uneven surface.
VectorStar will also be part of a workshop on Tuesday, January 28 at 1:30 p.m. Practical Measurements of Dielectric and Loss of PCB Materials at High Frequencies is intended to help designers better understand the low-loss materials properties in high-frequency applications for more efficient designs.
