September 9, 2011

John Coonrod is a Market Development Engineer for Rogers Corporation, Advanced Circuit Materials Division. John has 23 years of experience in the Printed Circuit Board industry. About half of this time was spent in the Flexible Printed Circuit Board industry doing circuit design, applications, processing and materials engineering. The past ten years have been spent supporting circuit fabrication, providing application support and conducting electrical characterization studies of High Frequency Rigid Printed Circuit Board materials made by Rogers. John has a Bachelor of Science, Electrical Engineering degree from Arizona State University. www.rogerscorp.com/acm. This blog is part of Microwave Journal's guest blog series.

Conductor surface roughness in printed-circuit boards (PCBs) is a material parameter that should not be overlooked. As detailed in the previous Blog in this series, the surface roughness of a PCB’s conductor layer can have a great deal of impact on signal losses through the conductors. If the effects of conductor surface roughness are not accounted for at the design stage, when using a commercial computer-aided-engineering (CAE) software simulation program, the predicted performance results of the simulations can deviate. These deviations can be significant from the actual performance measured from a designed prototype circuit. The differences can add up to lost design time, added design iterations, and added time and expense when creating a new circuit.

For those who may wonder how the roughness of a PCB conductor is measured, there are several techniques, including contact and non-contact methods. Measuring systems based on the use of contact gauges use a fine stylus to map a small area of a PCB’s conductor surface for its profile. This technique is limited in measurement speed and is typically confined to measuring a small area of the PCB, making it difficult to gauge the true conductor surface roughness across the full area of the circuit-board material.

Noncontact surface-roughness measurement approaches are usually based on optical spectroscopy and other optical techniques. At Rogers Corporation, for example, conductor surfaces have been characterized with a Wyko® NT1100 Optical Profiling System from Veeco (www.veeco.com). Designed for noncontact surface metrology of advanced materials, the small-footprint measurement system, which resembles an optical microscope, is based on white-light interferometry. The system can produce a three-dimensional image of the surface topology of a PCB’s conductor surface in an area as large as about 1 x 1 mm. The system has a vertical measurement range of 0.1 nm to 1 mm, with 1 Angstrom resolution and 0.01 nm root mean square (RMS) measurement repeatability. The measurement system also includes software which can be used to determine different statistical parameters, including RMS roughness and peak-to-valley roughness.

As mentioned previously, the work of S. P. Morgan in 1949 laid the foundation for much modern knowledge about the effects of conductor surface roughness. The “Morgan correlation,” a kind of correction factor for conductor surface roughness, is commonly used in calculators and programs designed to predict signal loss due to conductor surface roughness. Calculations usually involve a correction factor for surface roughness, K_r, which takes into account the relative roughness of a PCB conductor’s surface, as a ratio of a smooth surface to a rough surface. The Morgan correlation tends to predict the highest losses for conditions where the conductor surface roughness is the greatest and the highest frequencies of operation are being applied.

Still, in spite of its long track record, calculations based on Morgan’s work may be conservative in some cases, since those calculations predict worst-case loss for conductors with extremely rough surfaces that are about twice the loss of a perfectly smooth surface. More recent studies, including several performed by Rogers Corporation, indicate that losses may even exceed 3 dB more for a conductor with a rough surface compared to an ideal smooth conductor. And especially at frequencies above 10 GHz, these more recent studies have found the losses for particular rough conductor surface profiles to exceed the values predicted by the Morgan correlation.

Most recent studies on conductor surface roughness are targeted at developing accurate models to account for the electrical performance effects of surface roughness on both analog microwave and high-speed digital PCBs. In the search for an improved conductor surface-roughness model, the Morgan correlation is often used as a starting point. Calculations of conductor losses based on the Morgan correlation have traditionally agreed closely with measured results. It is important to note that those calculations are typically performed for microwave circuit materials that tend to be thicker than the thin substrates used in digital circuits. Any phase distortion, for example, induced by excessive conductor surface roughness, could translate into timing errors for a high-speed digital circuit. In addition, some studies have shown that the value of relative dielectric constant calculated for a thin substrate with rough conductor surface can be considerably higher than the value calculated for a PCB material with the same thickness, but with smooth conductor surface.

Because of possible deviations that can occur when basing a high-frequency or high-speed circuit design on conductor surface-roughness models, those models should include as much detail as possible about a PCB material’s attributes, including those that are frequency-dependent, such as the relative dielectric constant. Typically, three-dimensional (3D) full-wave electromagnetic (EM) field solvers as well as two-dimensional (2D) planar EM simulation software tools are used when modeling the effects of PCB conductor surface roughness on RF/microwave electrical performance. These tools should either include detailed models for a PCB material of interest, or provide the means of customizing a model of a PCB material, including a detailed profile of the PCB’s conductors.

Recent studies at Rogers Corporation on the effects of conductor profiles have shown that conductor surface roughness can impact the propagation constant of a PCB. When the differential phase length of a transmission line is used to calculate the effective dielectric constant, errors in the phase constant can lead to a misrepresentation of the dielectric constant of the material. In terms of CAE software tools, they must be able to account for the higher-than-expected conductor losses that can occur due to conductor surface-roughness effects, or calculated phase-constant results will be in error.

Some CAE software suppliers do provide tools for modeling the effects of conductor surface roughness, such as Sonnet 12.56.1 release and later from Sonnet Software (www.sonnetsoftware.com). It includes models that include the surface roughness effects of copper foils used in PCB materials from Rogers Corporation, and can calculate the surface impedance for either thin or thick copper conductors based on a ratio of smooth surface to rough surface.

More details on work being performed on analysis and model development of the effects of PCB conductor surface roughness can be found in several articles available for free download, “Effect of conductor profile on the insertion loss, phase constant, and dispersion in thin high frequency transmission lines” and “Conductor Profile Effects on the Propagation Constant of Microstrip Transmission Lines.” Both articles can be downloaded free of charge in PDF form from Rogers Corporation, at www.rogerscorp.com/acm.