Ask Harlan, September 19, 2006

From: Chong Yik Lam, Agilent Technologies

Dear Harlan,
When I look at the signal flow diagram shown in some of the journal publications, the reflection coefficient for a two-port network is p. The transmission coefficient would become 1+p considering this is a lossless network. Should the transmission coefficient be 1-p instead?

Dear Yik Lam,

When a mismatch occurs in a transmission line, it sets up a standing wave. The peak voltage becomes 1+p and the minimum voltage is 1-p. The VSWR is then (1+p)/(1-p) and the forward loss (in dB) is 10 log(1-p^2).

From: Tamer Abuelfadl, Cairo University

Dear Harlan,
We are trying to build a lab to manufacture planar circuits. I've tried to search the web for the required equipment, but I cannot seem to find anything useful. Could you please direct me to the companies that I could contact to build this type of lab?

Dear Tamer,

I'm sorry, but we do not recommend specific manufacturers. You don't say whether your lab is for testing or actual manufacturing. If it is testing, then any of the major test equipment companies will be happy to help you. If you are fabricating, then you will need to look for either etching or profiling machines. There are several companies that make machines for prototyping purposes. They advertise in Microwave Journal. Keep in mind that there are environmental problems associated with chemical etching.

From: Mohammed Rahman, RFS

Dear Harlan,
I am involved in a product that will have Antenna Interface Standard Group (AISG) functionality. One of the AISG requirements is the inrush current. The following is the spec from AISG. I cannot interpret this spec but was wondering if you could. Any help will be greatly appreciated: 6.4.4. TMA inrush current A TMA (including its optional ALD modem) shall exhibit the circuit equivalent of a DC power consumer with a current consumption of maximum 1 A in parallel with a capacitor of maximum 0.5 ìF.

Dear Mohammed,

I am not familiar with the spec or its interpretation. I suggest that you contact the people who wrote it at AISG and ask them what they mean.

From: Abdul Maalik, SUPARCO

Dear Harlan,
I have designed a PLL-based local oscillator at 3.39 GHz for use in a C-band satellite transponder. It has a phase noise of -92 dBc at 100 kHz offset, an output power of +10 dBm and stability of +/- 3 ppm. I now want to design a local oscillator for a Ku-band transponder at 12.75 GHz. What would be the best choice of oscillator topology for this? Should I go for a DRO option as I am not finding a PLL chip at such a high frequency?
Finally, I need an article by Surinder Kumar titled "Local Oscillator Selection for Digital Satellite Communications." This article was published in Microwave Journal, Vol. 31, July 1988. Only the abstract of this article is available on the Internet.

Dear Abdul,

Depending on the specs at Ku-band the DRO will probably work. The paper that you reference is too old to be available on-line. If you will provide us with your mailing address, we will send you a hard copy.

From: Mehdi Karimiyan, Iran University of Science and Technology

Dear Harlan,
Could you provide any suitable references for wideband multiplexer (diplexer, triplexer and quadraplexer) design (2 to 18 GHz)? Are there any suitable references for wideband filter (low pass, high pass and bandpass) design (2 to 18 GHz)? If possible, could you send me any references (suitable references for designing in ADS, Microwave Office, Ansoft Designer, etc.)?

Dear Mehdi,

All of the filter types that you mention are covered in Microwave Filters, Impedance-matching Networks and Coupling Structures, Matthaei, Young & Jones, Artech House Inc., 1980, ISBN#0-89006-099. There are no texts that describe design using various commercial software programs. Your best source of information will be the user manuals for each product.

From: Long Zhenjie

Dear Harlan,
I am a young RF engineer working for a company that focuses on a TD-SCDMA test instrument and am now working on PLL synthesizers. It is a wideband one conveying a frequency range from 1.6 to 2.4 GHz. We buy chips and components to build the synthesizer. The PLL chip we use is the ADF4106. I have a couple of questions on how the parameters of the synthesizers affect each other and how can we come to a good trade-off.
For example, the phase noise and the spurs will affect each other and we have to do some trade-off. The loop filter is also very important in the synthesizer system. How does the loop filter performance affect the whole system? The step size of our synthesizer is 200 kHz and we found obvious spurs in the spectrum analyzer 200 KHz offset from the output frequency. As we try to decrease them, the phase noise of the synthesizer is increased. We utilize the ADIsimPLL to simulate the PLL, but we cannot realize what is simulated in it. It always has 7 or more dBm difference. Any help you can provide is appreciated.

Dear Long,

The subject of synthesizers and PLLs has too many variables for me to give you any definitive answers in this column. I can direct you to two excellent books on the subject, which should be helpful. They are Digital Techniques in Frequency Synthesis, Bar-Giora Goldberg, McGraw-Hill, 1996, ISBN#0-07-024166-X and Phaselock Techniques, Third Edition, Floyd Gardner, Wiley, 2005, ISBN#13 978-0-471-43063-6.

From: Shayan Jafari, Capra

Dear Harlan,
I want to design a filter with the following features: f0=3 GHz, BW=6 MHz loss at f1=2.988 GHz and f2=3.012 GHz at least 25 dB. How can I go about this?

Dear Shayan,

For a .01 dB ripple filter, you will need four sections to get the required skirt attenuation. The real problem, however, is that in order to get a reasonable in-band loss (~1 dB) you will need a structure with an unloaded Q of about 10,000. There are no planar structures that will do this. You will have to use cavities, which are large and expensive. I suggest that you have a look at Microwave Filters, Impedance-matching Networks and Coupling Structures, Matthaei, Young & Jones, Artech House Inc., 1980, ISBN#0-89006-099-1.