Most GaN devices commercially available in the market today have either 28 or 50 V operating voltages. The 28 V devices are more common, but several manufacturers offer 50 V devices for even higher power circuits. The 50 V devices seem to be about the limit at which most GaN device processes can support today in order to provide long-term, reliable operation. However, a few companies have been working on much higher operating voltage GaN devices for extremely high-power applications and are pursuing better thermal solutions in conjunction with these efforts. I reached out to several companies for some examples of their work with 65+ V devices and received inputs from Integra Technologies and Qorvo, which are summarized here, along with an overview of some of the thermal solutions I have seen in the market.
PIONEERING HIGH VOLTAGE GaN TO REPLACE VACUUM ELECTRON DEVICES
Integra Technologies
Many aerospace and defense radar, SATCOM and industrial, scientific and medical (ISM) systems require highly reliable, rugged components with RF output power levels of several kilowatts. These systems have historically relied on vacuum electron devices (VED) such as traveling wave tubes (TWT) to generate multi-kW power levels. To address the increasing complexity and cost of VED based systems, semiconductor-based, solid-state power amplifiers (SSPA) have overtaken lower frequency and lower power applications, first with silicon LDMOS, then GaAs and now GaN. However, the high-power market is still predominantly addressed with VEDs.
Figure 1 Performance comparison of technologies for high-power amplifiers.
In radar applications, LDMOS technology has made minimal inroads for high RF power due to its low frequency limitations. While GaAs technology is capable of operation above 100 GHz, its low thermal conductivity and operating voltage limit its output power levels. To achieve high-power, GaAs amplifiers require paralleling of multiple devices at the expense of loss in efficiency and cost resulting from multiple devices. Today’s 50 V GaN/SiC technology offers hundreds of W of output power at high frequencies, and provides the ruggedness and reliability required by radar systems (see Figure 1) but struggles to go beyond that.
Since 2014, Integra Technologies has been pioneering research and development in the area of high voltage (HV) GaN/SiC to further extend the technology to achieve multi-kW power levels for next generation radar systems. As system designers are challenged with increasing complexity of radars while needing to reduce lifetime operational costs, the push for a solid-state solution leveraging commercial manufacturing platforms is more imperative than ever. Integra’s HV GaN/SiC has demonstrated very high-power densities in the order of 10 W/mm for 100 V CW operation and 20 W/mm for 150 V pulsed operation and efficiencies exceeding 80 percent.
HV GaN Technology
Higher voltage operation at the transistor level opens up new degrees of freedom for the design of high-power RF amplifiers. The technology allows for more trade off space between higher power density and higher impedance. This flexibility results in the ability to match up to 10 kW single ended transistors into a 50 Ω load and achieve 80 percent efficiency at UHF frequencies with proper harmonic tuning optimization. Integra has successfully demonstrated such performance at higher frequencies from L- through X-Band.
One of the challenges of operating at high power densities of 10 to 20 W/mm is pulling the heat away from the active region of the semiconductor device. Integra has addressed this thermal management challenge through a combination of leveraging Integra thermal patents and proprietary HV GaN/SiC epitaxial material, device design and packaging.
Figure 2 shows a single 50 mm HV GaN transistor operated at 100 V in CW at 325 MHz and achieving >10 W/mm with 77 percent efficiency. By incorporating Integra’s thermally enhanced technology, the device operates at a junction temperature of 160°C for 10 million hours operating lifetime. These devices can also operate at 150 V bias in pulsed conditions to achieve 20 W/mm or 1 kW single device at 650 MHz (see Figure 3) with 80 percent efficiency. Similar performance has been achieved from L- up to X-Band. Integra continues to innovate on the next generation of HV GaN/SiC technology with the goal to further improve efficiencies, increase power levels and extend frequency range of operation.
Figure 2 550 W high voltage GaN/SiC single die transistor performance.
Figure 3 1.1 kW high voltage GaN/SiC single die transistor performance.
Benefits of HV GaN
For high-power systems in the 100 kW range, system designers have been limited to VED technology or 50 V GaN/SiC SSPA. For solid-state designs, a large number of power devices are required to achieve the required multi-kW target power levels. Integra’s HV GaN/SiC is capable of realizing significantly higher power levels while dramatically reducing RF power transistor count, system complexity and overall cost.
For example, a 200 kW system architected with 50 V, 1 kW transistors would require over 200 transistors to reach the target power level with complex power combining and associated losses in efficiency. Utilizing 10 kW HV GaN/SiC transistors, the same 200 kW system would require around 20 transistors. This eliminates a significant number of components and complex power combining of those components plus results in the system running at significantly higher efficiency. This allows the radar systems engineers to design a more competitive, lower cost radar with lower operating expenses over its lifetime.
The HV GaN/SiC technology has been developed utilizing high volume, production grade SiC substrates rather than more exotic substrate materials such as diamond which are expensive and limited in supply. The HV GaN process is built on mainstream, commercially available materials and manufacturing platforms to reduce cost and service volume applications (see Table 1).
Integra’s HV GaN/SiC offers a solid-state replacement path for VEDs today with technology that utilizes a mainstream, commercially available supply chain. By leveraging Integra’s patented thermally enhanced technology, the platform has solved the heat management challenges resulting from high power density operation to develop a more reliable and robust technology capable of addressing the needs of next-generation radars.
160 W GaN PA CONQUERS THE THERMAL CHALLENGES OF SMT PACKAGING
Qorvo
Figure 4 One of the fully assembled power amplifiers. The hole in the front of the aluminum carrier allows a thermocouple to be placed directly below the QPD1013 transistor.
Innovations in GaN technology are enabling operation at higher powers, supply voltages and frequencies - all critical elements for advanced L-Band radar and other wideband communications. GaN is capable of higher power densities than either LDMOS or GaAs. But with higher RF power levels, thermal performance must be optimized to keep the junction temperature adequately low, minimize power dissipation and ensure a long transistor lifetime. When the transistor is a surface-mount technology (SMT) component, careful design of the PCB is required in order to optimize thermal performance.
One PA that is addressing this HV and thermal challenge is a reference design using the Qorvo QPD1013 - a high-power, wide-bandwidth high electron mobility transistor (HEMT). Housed in an industry-standard 7.2 mm x 6.6 mm surface-mount, dual flat no leads (DFN) package, the device allows for simpler PCB assembly compared to traditional metal-ceramic packages as shown in Figure 4.
The QPD1013 utilizes Qorvo’s 0.5 μm GaN/SiC technology, which enables operation at 65 V. This delivers improved efficiency and wide bandwidths suitable for many applications from DC to 2.7 GHz, including military radar, and land-mobile and military radio communications. The example PA covers the 1.2 to 1.8 GHz band and delivers an RF output power of around 160 W with an efficiency of around 55 percent as shown in Figure 5. While the efficiency of the PA is impressive, the dissipated power can still exceed 100 W, highlighting the need for an effective thermal solution.
Figure 5 Typical output power (a) and efficiency at the output of the PA of 55 percent (b) which includes output matching network and connector losses.
Figure 6 S-parameter comparison for using copper vias vs. copper coin for QPD1013 transistor.
To optimize thermal performance, the reference design PA uses copper coin technology. A copper coin is a solid piece of copper, or slug, embedded into the PCB during fabrication to allow efficient heat transfer from the transistor to the carrier on which the PCB is mounted. While the use of copper-filled via technology is common and the most cost effective, use of copper-coin techniques provides better thermal transfer.
As shown in Figure 6, the copper coin has a minor effect on the RF performance of the amplifier and must be taken into consideration in the design. Although the improved thermal impedance of the copper coin is attractive, great care must be taken to ensure that the surface of the PCB remains planar and that good contact is made between the copper coin and the ground paddle of the DFN. Any air gaps or solder voids can mitigate the inherent advantages of the copper coin approach.
As with all power transistors, careful thermal design is essential to reliable operation. In the QPD1013, use of a copper coin PCB delivers an operating temperature 10°C cooler compared to copper-filled via PCB. The PAs high-power and broad bandwidth, supported by its thermally efficient design, is helping to drive mission superiority in military and commercial radar, land mobile and military radio communications, active antennas, test instrumentation, wideband and narrowband amplifiers and jammers.
Improved Thermal Solutions
One key to HV operation and higher efficiency is getting the heat out of the device to keep the junction temperature in an acceptable range for reliable operation. One method that many manufacturers have researched is GaN on diamond since it has the highest thermal conductivity of any material while others are pursuing better heat sinking or liquid cooling options.
As we covered in our June issue last year, TriQuint (now Qorvo) announced the production of the first GaN on Diamond wafers producing HEMT in April 2013, in conjunction with partners at the University of Bristol, Group4 Labs and Lockheed Martin under the Defense Advanced Research Projects Agency’s (DARPA) Near Junction Thermal Transport (NJTT) program. NJTT focused on device thermal resistance near the junction of the transistor using various cooling techniques. The results of this effort showed a three-fold improvement in heat dissipation, while preserving RF capabilities.
Raytheon also did work under the same DARPA program and developed a way to etch cooling channels in a diamond substrate and attach it to the wafer, avoiding some of the manufacturability issues with growing the GaN on the diamond substrate, and added liquid cooling. Raytheon used a glycol/water coolant to flow through the channels within 100 microns of the active HEMT area. Raytheon demonstrated a wideband continuous-wave (CW) amplifier with 3.1x the power output and 4.8x the power density of the baseline amplifier currently designed into a next-generation electronic warfare (EW) system.
More recently, Fujitsu Ltd. and Fujitsu Laboratories Ltd. announced development of the first technology for bonding single-crystal diamond to a SiC substrate at room temperature. This overcame one of the biggest challenges to previous GaN on Diamond bonding that took place at very high temperatures causing bowing of the wafers due to mismatch of coefficient of thermal expansion (CTE). This technology promises GaN PAs that can operate at higher power by about 1.5x when applied to systems such as weather radar.
RFHIC acquired GaN on Diamond technology from Element Six and in their 2017 announcement, the company stated that “RFHIC will work closely with Element Six and foundry partners for the capability of manufacturing 10,000 6-in. GaN on Diamond wafers per year in the foreseeable future.” The technology has taken a little longer to launch than they projected but seem ready to sample the product soon.
JETCOOL Technologies unveiled a new approach to cooling high-power electronics at IMS2019 in Boston, winning the MIT spin-off of the title of Next Top Startup in the new Startup Pavilion. The company is trying to change the way electronics are cooled by using microconvective cooling that uses small fluid jets that can be built within the electronic device. The result according to the company is 10x better cooling than other cooling technologies used today as shown in Figure 7. CEO Bernie Malouin said in a press release that the technology can build the heat sink into the silicon substrate, integrating cooling into the processor chip and other devices.
Figure 7 Comparison of thermal performance of various cooling methods (from JETCOOL website).
Their patent-pending process on microjet cooling uses small jets of high velocity fluid to cool the device. Instead of passing fluid over a surface like in typical heat sinks or cold plates, microjets are aimed directly at the surface. The high flow effectively cools the bottom of the chip providing better cooling than previous methods. Their solution provides cooling without a need for large metal heat sinks, eliminating the metal makes tower-based systems smaller and lighter.
JETCOOL discusses GaN/SiC devices specifically in one of their blog postings making the point that the thermal conductivity of a GaN device operating up to 225°C is about 50 percent of what it would be at the reference temperature of 25°C. As the underlying SiC layer warms, its thermal conductivity is also reduced. “This turns into a cascade effect where lower conductivity means higher temperature, which further lowers conductivity until equilibrium is reached. Therefore, if temperature dependence is not incorporated into the material properties, computed peak temperatures would be artificially low due to the inappropriately high thermal conductivity.”
GaN devices are continuing to improve their performance every year, and we have not come close to the ceiling of their performance yet as manufacturers find better epi processes, transistor configurations and packaging solutions to improve heat dissipation.
