Xilinx, Inc. announced delivery of its Zynq® UltraScale+™ RF SoC family, a breakthrough architecture integrating the RF signal chain into an SoC for 5G wireless, cable remote-PHY and radar. Based on a 16 nm UltraScale+ MPSoC architecture, the programmable RF SoCs monolithically integrate RF data converters, for up to 50–75 percent system power and footprint reduction, and soft-decision forward error correction (SD-FEC) cores to meet 5G and DOCSIS 3.1 standards.

With silicon samples already shipping to multiple customers, the early access program for the Zynq UltraScale+ RFSoC family is now available.

A System on Chip for the RF Signal Chain

Devices in the family feature:

• Eight 4 GSPS or sixteen 2 GSPS 12-bit ADCs
• Eight to sixteen 6.4 GSPS 14-bit DACs
• Integrated SD-FEC cores with LDPC and turbo codecs for 5G and DOCSIS 3.1
• ARM processing subsystem with quad-core Cortex™-A53 and dual-core Cortex™-R5s
• 16 nm UltraScale+ programmable logic with integrated Nx100G cores
• Up to 930,000 logic cells and over 4,200 DSP slices

Applications addressed by the Zynq RF SoC family include remote radio heads for massive MIMO, millimeter wave mobile backhaul, 5G baseband, fixed wireless access, remote-PHY nodes for cable, radar, test and measurement, satellite and military communications and other high performance RF applications.

5G Wireless

Zynq UltraScale+ RF SoC devices now make viable the most bandwidth intensive systems for next-generation wireless infrastructure. 5G imperatives — ranging from 5x bandwidth, 100x user data rates and 1000x greater network capacity — would be unattainable without breakthroughs at the system level. The integration of discrete RF data converters and signal chain optimization in Zynq UltraScale+ RF SoCs allow remote radio heads for massive MIMO, wireless backhaul and fixed wireless access, to realize high channel density with 50–75 percent power and footprint reduction. Multiple integrated SD-FEC cores enable 10–20x system throughput, versus a soft core implementation for 5G baseband, within stringent power and thermal constraints,

Cable Remote-PHY

Similarly, in next-generation cable broadband services, Zynq RF SoCs provide a combination of small form factor, power efficiency and hardware flexibility to enable remote-PHY systems. Distributed access architectures push DOCSIS 3.x PHY functionality from the centralized headend to the remote-PHY node located closer to consumers. By replacing inefficient analog optical transmission with ubiquitous Ethernet transport, network capacity, scale and performance improves. With RF integration and an LDPC FEC-enabled signal chain, RF SoCs ensure flexible remote-PHY deployment for greater spectral efficiency prescribed by DOCSIS 3.1.

Radar

Zynq RF SoCs also deliver the needed performance and adaptability for key government programs, such as the multi-function phased array radar (MPAR) initiative, combining the functions of several national radar networks into a single system for aircraft and weather surveillance. Because these leading edge systems must operate in real-time, the inherent integration of RF-analog makes the Zynq UltraScale+ RF SoC an ideal solution. Zynq RF SoC devices are currently designed into the Rockwell Collins' Common Module beamformer for the DARPA Arrays at Commercial Time Scales (ACT) program, which aims to shorten design cycles and in-field updates while pushing past traditional barriers for delivering radar arrays.

Availability

Zynq UltraScale+ RF SoC device samples are shipping now, and Vivado® Design Suite early access supporting Zynq UltraScale+ RF SoC devices is also available. Customers interested in the Zynq UltraScale+ RF SoC early access program can contact their local Xilinx representative.

For more information, please visit: www.xilinx.com/rfsoc.