Analog Devices, Inc. (ADI) introduced a 28 nm digital-to-analog converter (DAC) as part of a new series of high speed DACs. The AD9172 meets the demands of gigahertz bandwidth applications and delivers the increased spectral efficiency needed for 4G/5G multi-band wireless communications base stations and 2 GHz E-Band microwave point-to-point backhaul radios. Its design benefits production instrumentation targeting multi-standard direct-to-RF signal synthesis and provides a solution for defense electronics requiring greater detection range.

The dual 16-bit, 12 GSPS AD9172 provides direct-to-RF synthesis up to 6 GHz, eliminating the IF-to-RF up-conversion stage and LO generation. This simplifies the overall RF signal chain and lowers overall system cost. The AD9172 maintains superior linearity and noise performance across these RF frequencies, providing system architects with the highest level of configurability. Independent numerically controlled oscillator (NCO), digital gain control and various interpolation filter combinations per input channel provide designers with a rich suite of signal processing options that allow flexible signal chain partitioning between the analog and digital domains, further enabling system designers to develop software defined platforms. It is complemented by the AD9208, a 28 nm analog-to-digital converter (ADC) that was also released.

Based on 28 nm CMOS technology, this device sets new performance benchmarks: best-in-class dynamic range, signal bandwidth and low power consumption unmatched by alternative solutions. The AD9172, as part of the complete new ADC portfolio, will be demonstrated at the upcoming International Microwave Symposium (IMS).

AD9172 Product Highlights

• Supports single and multi-band wireless applications, with three bypassable complex data input channels per RF DAC at a max complex input data rate of 1.5 GSPS. One independent NCO per input channel.
• Selectable interpolation filters provide up to 8x configurable data channel interpolation and up to 12x configurable final interpolation to support a complete set of input data rates.
• Final 48-bit NCO that operates at the DAC rate to support frequency synthesis up to 6 GHz.
• Flexible 8-lane 15 Gbps JESD204B (subclass 0 and 1) interface that also supports12-bit high density mode for increased data throughput.
• High performance, low noise, on-chip phase-locked loop (PLL) clock multiplier supports 12 GSPS DAC update rate and provides an observation ADC clock driver with selectable divide ratios.

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